From: Frank Buss
Subject: Lisp for generating VHDL code?
Date: 
Message-ID: <1azovdozzit9f$.j5xxulp6pyih.dlg@40tude.net>
I'm designing some FPGA hardware, but VHDL is too limited (no macros,
tedious when-case constructs for implementing serial logic etc.). Is it
possible to use Lisp for generating VHDL?

There is something at this address, which looks good:

http://www.cs.utexas.edu/users/moore/acl2/v3-0/distrib/acl2-sources/books/workshops/1999/vhdl/fact.lisp

Any other good examples?

-- 
Frank Buss, ··@frank-buss.de
http://www.frank-buss.de, http://www.it4-systems.de

From: ···············@space.at
Subject: Re: Lisp for generating VHDL code?
Date: 
Message-ID: <uzm3nud0f.fsf@space.at>
Not Lisp, but Haskell (predecessors used Caml):
http://www.confluent.org/wiki/doku.php/atom?DokuWiki=9ecbb7fbb577cd2abe4400a4cc972bb6
HTH
                                    Roland 
From: Petter Gustad
Subject: Re: Lisp for generating VHDL code?
Date: 
Message-ID: <7dtztu6rpa.fsf@www.gratismegler.no>
I would rather use Lisp as a HDL (CLHDL). This would require a
simulator (or at least a runtime library like in SystemC) and a
synthesis tool which could generate EDIF, or even better GDSII.

I would assume that the VHDL structured code you refer to is something
used to convert VHDL to Lisp to Boyer-Moore like sexp for formal
analysis in order to prove VHDL circuits. Such a conversion would be
simpler with a CLHDL.

There's an old paper called "The Symbolics Ivory Design and
Verification Strategy" from the 1987 IEEE International Conference on
Computer Design: VLSI in Computers & Processors. This paper describes
a Lisp based HDL and a system called the NS design system.

However, I have not found any other references on the NS design system
and whatever happened to it. Does anybody in c.l.l. know?


Petter
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From: Rainer Joswig
Subject: Re: Lisp for generating VHDL code?
Date: 
Message-ID: <joswig-9368AB.23135630052007@news-europe.giganews.com>
In article <··············@www.gratismegler.no>,
 Petter Gustad <·············@gustad.com> wrote:

> I would rather use Lisp as a HDL (CLHDL). This would require a
> simulator (or at least a runtime library like in SystemC) and a
> synthesis tool which could generate EDIF, or even better GDSII.
> 
> I would assume that the VHDL structured code you refer to is something
> used to convert VHDL to Lisp to Boyer-Moore like sexp for formal
> analysis in order to prove VHDL circuits. Such a conversion would be
> simpler with a CLHDL.
> 
> There's an old paper called "The Symbolics Ivory Design and
> Verification Strategy" from the 1987 IEEE International Conference on
> Computer Design: VLSI in Computers & Processors. This paper describes
> a Lisp based HDL and a system called the NS design system.
> 
> However, I have not found any other references on the NS design system
> and whatever happened to it. Does anybody in c.l.l. know?

C. Baker, J. Cherry, N. Mayle, H. Minsky, K. Reti, H. Shrobe, and N. Weste.
NS: An Integrated Symbolic Design System. In VLSI 85, Tokyo 1985.


I have looked for that too. I found a web page some
time ago where somebody wrote that he used a successor
of NS. But I can't remember where that was, sigh.

> 
> 
> Petter

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