BR <··········@comcast.net> writes:
> Question for the group. What do you find as the most suitable embedded
> processor for implimenting LISP?
Symbolics Ivory.
:)
"BR" <··········@comcast.net> wrote in message
··································@comcast.net...
> Question for the group. What do you find as the most suitable embedded
> processor for implimenting LISP?
We find the PowerPC architecture to be the best embedded processor period.
It also happens to run Lisp well.
Gorbag
"Gorbag" <······@invalid.acct> writes:
> "BR" <··········@comcast.net> wrote in message
> ··································@comcast.net...
>> Question for the group. What do you find as the most suitable embedded
>> processor for implimenting LISP?
>
> We find the PowerPC architecture to be the best embedded processor period.
> It also happens to run Lisp well.
Are there any features of this architecture that make it well suited
for Lisp?
Regards,
--
____________________________
Julian Stecklina / _________________________/
________________/ /
\_________________/ LISP - truly beautiful
Gorbag wrote:
> "BR" <··········@comcast.net> wrote in message
> ··································@comcast.net...
> > Question for the group. What do you find as the most suitable
embedded
> > processor for implimenting LISP?
>
> We find the PowerPC architecture to be the best embedded processor
period.
> It also happens to run Lisp well.
>
> Gorbag
I concur with Gorbag.
Someone asked why: there are several PowerPC instructions, such as for
example, rlwinm (Rotate Left Word Immediate Then AND with Mask), which
allow you to extract bitfields for type checking very easily. The
Motorola PowerPC processors allow you to lock cache lines to store
critical variables in the L1 cache for deterministic access and some
(745x) have capability for a large L3 Cache as well as a private memory
area. Not to mention Altivec. High-Temp, High-Rel parts are available
and operating power consumption is on the lower end of the scale.
Other embedded processors like ARM take too long to do IPC and don't
have enough muscle. Every iteration they keep adding instructions,
pretty soon they will end up with a powerpc.
As for embedded systems running x86 PC-104s which another poster
mentioned this is probably done for cost reasons (ie speculative
project). Most fighter planes, helicopters, submarines, missles, tanks
use multiple PowerPC 7xx and 74xx or 75xx networked via GigE or
FibreChannel running everything from PPC Linux to Green Hills Integrity
RTOS. I've never personally seen an embedded lisp app on these things,
(C, C++ (yeah) and ADA, and two Java apps w/IBM's JVM) but obviously
with OpenMCL's providence they do exist. I expect with the 'mini mac'
form factor Apple might sell these to VARs to put into embedded
systems. But then again, knowing apple, probably not.
-"Solid Gold" Suleyman
note to 'war on terror' people: I am a 'shotgun and pickup' redneck, I
took my usenet name after another motorola engineer who got his
nickname from spending a lot of time at a Tampa establishment and being
a project liability, rather than an asset.
"Kadir Solid Gold Suleyman" <·················@yahoo.com> writes:
> Gorbag wrote:
>> "BR" <··········@comcast.net> wrote in message
>> ··································@comcast.net...
>> > Question for the group. What do you find as the most suitable
> embedded
>> > processor for implimenting LISP?
>>
>> We find the PowerPC architecture to be the best embedded processor
> period.
>> It also happens to run Lisp well.
>>
>> Gorbag
>
> I concur with Gorbag.
>
> Someone asked why: there are several PowerPC instructions, such as for
> example, rlwinm (Rotate Left Word Immediate Then AND with Mask), which
> allow you to extract bitfields for type checking very easily.
Is there anything left of this in current IBM Power4+ or Power5
processors? I have to give a talk about this topic and it would be
nice, if I have an excuse for a Lisp detour. ;)
Regards,
--
____________________________
Julian Stecklina / _________________________/
________________/ /
\_________________/ LISP - truly beautiful
Julian Stecklina <··········@web.de> writes:
> Is there anything left of this in current IBM Power4+ or Power5
> processors? I have to give a talk about this topic and it would be
> nice, if I have an excuse for a Lisp detour. ;)
AFAIK, the POWER and PowerPC lines are essentially binary-compatible.
That is how Linux could run on RS/6000 servers long before a proper port
(to fix glibc's memset() and add 64-bit support).
--
Rahul Jain
·····@nyct.net
Professional Software Developer, Amateur Quantum Mechanicist
Rahul Jain <·····@nyct.net> writes:
> Julian Stecklina <··········@web.de> writes:
>
> > Is there anything left of this in current IBM Power4+ or Power5
> > processors? I have to give a talk about this topic and it would be
> > nice, if I have an excuse for a Lisp detour. ;)
>
> AFAIK, the POWER and PowerPC lines are essentially binary-compatible.
> That is how Linux could run on RS/6000 servers long before a proper port
> (to fix glibc's memset() and add 64-bit support).
The architectures are almost binary compatible. The POWER and POWER2
have over fifty additional instructions and five registers not found
on the PowerPC and are missing around forty PowerPC-only instructions.
However, you can easily generate code which is binary compatible and
requires no instruction emulation. At least on AIX, many of these
fringe instructions unsupported by the CPU will trap and be emulated
in the kernel.
Rahul Jain <·····@nyct.net> writes:
> Julian Stecklina <··········@web.de> writes:
>
>> Is there anything left of this in current IBM Power4+ or Power5
>> processors? I have to give a talk about this topic and it would be
>> nice, if I have an excuse for a Lisp detour. ;)
>
> AFAIK, the POWER and PowerPC lines are essentially binary-compatible.
> That is how Linux could run on RS/6000 servers long before a proper port
> (to fix glibc's memset() and add 64-bit support).
Thanks for the information.
Regards,
--
____________________________
Julian Stecklina / _________________________/
________________/ /
\_________________/ LISP - truly beautiful
I think the suitability for Lisp is going to rank far below other
considerations such as power consumption, memory capacity,
computational horsepower needed, etc.
Lisps (though probably not Common Lisp) have been implemented on
everything from 8-bit micros to 64-bit workstations. If you've got
enough memory and horsepower to gain benefits from a high-level
language, Lisp can almost certainly help, if not come along for the
ride.
For ultra-small applications (say, a PIC-sized device), you might only
be able to fit Lisp into a development platform, emitting compact code
to download to your embedded processor. Run-time support for any Lisp
would probably fill a typical PIC and then some.
On Mon, 17 Jan 2005 21:25:02 -0500, BR <··········@comcast.net> wrote:
> Question for the group. What do you find as the most suitable embedded
> processor for implimenting LISP?
A processor with 64 bit registers could hold a entire cons cell in a
register
(assuming 32 bit address space). So the Itanium or Alpha ought to have
a advantage. (At least it seems that way to me.)
--
Using M2, Opera's revolutionary e-mail client: http://www.opera.com/m2/
> > Question for the group. What do you find as the most suitable embedded
> > processor for implimenting LISP?
>
> A processor with 64 bit registers could hold a entire cons cell in a
> register
> (assuming 32 bit address space). So the Itanium or Alpha ought to have
> a advantage. (At least it seems that way to me.)
If you put an entire cons cell in a 64-bit register, would you be
giving up the ability to have more than 4 GB in your heap?
rif
rif <···@mit.edu> writes:
> > > Question for the group. What do you find as the most suitable embedded
> > > processor for implimenting LISP?
> >
> > A processor with 64 bit registers could hold a entire cons cell in a
> > register
> > (assuming 32 bit address space). So the Itanium or Alpha ought to have
> > a advantage. (At least it seems that way to me.)
>
> If you put an entire cons cell in a 64-bit register, would you be
> giving up the ability to have more than 4 GB in your heap?
Of course. 32-bit addresses means you can move 4 G cells. Since each
cell would be 64-bit, you'd be able to use 32 GB.
--
__Pascal Bourguignon__ http://www.informatimago.com/
You never feed me.
Perhaps I'll sleep on your face.
That will sure show you.
Pascal Bourguignon <····@mouse-potato.com> writes:
> 32-bit addresses means you can move 4 G cells. Since each
> cell would be 64-bit, you'd be able to use 32 GB.
But then you wouldn't have any bits left for tags.
Kalle Olavi Niemitalo <···@iki.fi> writes:
> Pascal Bourguignon <····@mouse-potato.com> writes:
>
> > 32-bit addresses means you can move 4 G cells. Since each
> > cell would be 64-bit, you'd be able to use 32 GB.
>
> But then you wouldn't have any bits left for tags.
They could be stored elsewhere.
They should be stored elsewhere to have a smooth FFI with C.
--
__Pascal_Bourguignon__ _ Software patents are endangering
() ASCII ribbon against html email (o_ the computer industry all around
/\ 1962:DO20I=1.100 //\ the world http://lpf.ai.mit.edu/
2001:my($f)=`fortune`; V_/ http://petition.eurolinux.org/
"John Thingstad" <··············@chello.no> writes:
> On Mon, 17 Jan 2005 21:25:02 -0500, BR <··········@comcast.net> wrote:
>
>> Question for the group. What do you find as the most suitable embedded
>> processor for implimenting LISP?
>
> A processor with 64 bit registers could hold a entire cons cell in a
> register
> (assuming 32 bit address space). So the Itanium or Alpha ought to have
> a advantage. (At least it seems that way to me.)
But he was looking for "embedded" processors, wasn't he?
For our LispWorks server applications, we get the best results with
AMD Athlon64 and Opteron (note: LW is still 32 bit), the are /much/
faster than Xeon. Maybe a pipelining issue...?
--
(espen)
Espen Vestre <·····@*do-not-spam-me*.vestre.net> writes:
> "John Thingstad" <··············@chello.no> writes:
>
> > On Mon, 17 Jan 2005 21:25:02 -0500, BR <··········@comcast.net> wrote:
> >
> >> Question for the group. What do you find as the most suitable embedded
> >> processor for implimenting LISP?
> >
> > A processor with 64 bit registers could hold a entire cons cell in a
> > register
> > (assuming 32 bit address space). So the Itanium or Alpha ought to have
> > a advantage. (At least it seems that way to me.)
>
> But he was looking for "embedded" processors, wasn't he?
An "embedded processor" is any processor that you embed in anything,
so the answer could be absolutely anything; there's really no telling
what he's after. In the half-joking answer that I gave, I suggested
the Ivory chip, at 40+ bit processor specialized for Lisp (which was
succesfully used in a real-time embedded system (AT&T telephone switch).
But I would also not seriously recommend the Alpha, because it's also
an end-of-life product. And Itanium seems to be a computer that nobody
wants, and I don't know if it even has a native-mode Lisp implementation.
A more serious suggestion for a 64-bit chip would be a PowerPC.
But a low-end x86 chip running "ECL" Lisp or something might be more
what he wanted. We know nothing about his hardware or software requirements,
except that it run Lisp and probably be smaller than an IBM/360 model J.
······@news.dtpq.com (Christopher C. Stacy) writes:
> An "embedded processor" is any processor that you embed in anything,
Sure, but afaik, all the major cpu vendors use this term when marketing
processor families that are targeted at embedded systems.
--
(espen)
Espen Vestre <·····@*do-not-spam-me*.vestre.net> writes:
> ······@news.dtpq.com (Christopher C. Stacy) writes:
>
> > An "embedded processor" is any processor that you embed in anything,
>
> Sure, but afaik, all the major cpu vendors use this term when
> marketing processor families that are targeted at embedded systems.
The meaning changes all the time, and depending on context.
For example, some military people who I've been in touch with
lately are building a special robot vehicle that drives around
and does something; they refer to the various subsystems on board
as being "real-time embedded" systems. The CPUs involved are
not Z80s or ARM; they are going to be fast x86 machines,
probably running Linux, along with some other custom signal
processing chips. The main computers will, however, be on small
form-factor boards called PC-104.
An embedded computer could be anything from an aircraft's flight
surface (eg. part of a wing) sensor or control microprocessor,
to a cell phone or an iPod, to a cash register or a robot.
It could be a piece of lab equipment that is tiny or maybe
takes up a rather large room.
There's no telling what someone wants when they just say "embedded".
A while ago, when computers were less powerful per surface area,
you could make more generalized guesses about the hardware implied
when someone said "embedded". The software on these tiny computers
was almost always written in assembley language (not even C was
tight enough, a lot of the time). Today, there is much more range in
both processor capabilities and possible "embedded" applications.
······@news.dtpq.com (Christopher C. Stacy) writes:
> There's no telling what someone wants when they just say "embedded".
Sure. And the OP hasn't return to clarify his much too open question,
so what are we discussing ;-)?
--
(espen)
Espen Vestre wrote:
> Sure. And the OP hasn't return to clarify his much too open question,
> so what are we discussing ;-)?
If we assume that the OP was asking a bona fide question, rather than
offering us a riddle or koan, then obviously he/she/it assumed that we'd
be able to attach a reasonable meaning to the question. I'm certainly
able to.
The Sparc architecture has hardware support for tag bits which have been
profitably used in implementing Lisp, so chips based on that could be
considered.
x86 based microcontrollers have the advantage of the ease of porting one
of the PC based implementations of Lisp.
I suspect that for any application where Lisp running in the device
would be worthwhile, 8 or 16 bit CPUs would prove too limiting.
Scheme CPUs have been constructed before, taking on the order of one
grad-student-year, so a custom solution running on an FPGA is a possibility.
On Wed, 19 Jan 2005 04:58:44 -0500, Cameron MacKinnon wrote:
> Espen Vestre wrote:
>> Sure. And the OP hasn't return to clarify his much too open question,
>> so what are we discussing ;-)?
>
> If we assume that the OP was asking a bona fide question, rather than
> offering us a riddle or koan, then obviously he/she/it assumed that we'd
> be able to attach a reasonable meaning to the question. I'm certainly
> able to.
I can see not the best of assumptions.
> The Sparc architecture has hardware support for tag bits which have been
> profitably used in implementing Lisp, so chips based on that could be
> considered.
Well this is what I'm driving at. A CPU that's LISP friendly.
Theoretically any CPU can run LISP. But it's better to find one that fits
best.
> x86 based microcontrollers have the advantage of the ease of porting one
> of the PC based implementations of Lisp.
>
> I suspect that for any application where Lisp running in the device
> would be worthwhile, 8 or 16 bit CPUs would prove too limiting.
>
> Scheme CPUs have been constructed before, taking on the order of one
> grad-student-year, so a custom solution running on an FPGA is a
> possibility.
Well I've been (and still am) researching some of the answers provided.
Thanks everyone! Basically the Sparc looks like a good match. Now the only
problem is finding a non-backplane SBC using it.
BR wrote:
>
>>The Sparc architecture has hardware support for tag bits which have been
>>profitably used in implementing Lisp, so chips based on that could be
>>considered.
>
>
> Well this is what I'm driving at. A CPU that's LISP friendly.
> Theoretically any CPU can run LISP. But it's better to find one that fits
> best.
>
Well the Lisp Machine CPUs were very friendly, HOWEVER, the chip line
died out. By the time you might get a Lisp running on Sparc it may no
longer be around. It is another thing to consider. (Solaris on x86
anyone?). BTW, why not just get clisp, it compiles with gcc to
many platforms (CPUs and OSes). It has a low footprint and runs well.
Wade
Wade Humeniuk wrote:
> Well the Lisp Machine CPUs were very friendly, HOWEVER, the chip line
> died out. By the time you might get a Lisp running on Sparc it may no
> longer be around. It is another thing to consider. (Solaris on x86
> anyone?). BTW, why not just get clisp, it compiles with gcc to
> many platforms (CPUs and OSes). It has a low footprint and runs well.
I was under the impression that Fujitsu was doing quite well with their
Sparc line. Have you heard anything to the contrary, or are you assuming
that if Sun fails, then that will be the end of Sparc?
As to clisp, it may not do so well embedded. Byte code interpreters are
the new microcode, and they work really well on systems with large
caches and comparatively high latency to main memory, which often isn't
the case with embedded systems. We don't know enough about this
particular case, of course. As always, when in doubt, test.
Cameron MacKinnon <··········@clearspot.net> writes:
> I was under the impression that Fujitsu was doing quite well with their
> Sparc line. Have you heard anything to the contrary, or are you assuming
> that if Sun fails, then that will be the end of Sparc?
Sun is supposedly ending their licensing agreement with Fujitsu even
before they end-of-life the sparc line.
Note that tag bits are no longer supported (or at least not efficiently,
I forget where the transitions were supposed to have occurred) in modern
UltraSPARCs.
--
Rahul Jain
·····@nyct.net
Professional Software Developer, Amateur Quantum Mechanicist
Espen Vestre <·····@*do-not-spam-me*.vestre.net> writes:
> ······@news.dtpq.com (Christopher C. Stacy) writes:
>
> > An "embedded processor" is any processor that you embed in anything,
>
> Sure, but afaik, all the major cpu vendors use this term when marketing
> processor families that are targeted at embedded systems.
Yes, but e.g. Freescale (formerly a part of Motorola Semiconductor)
has "32-bit embedded processors" ranging from 8MHz M68000s to 1.3GHz
MPC7457 (aka the G4 in Apple products) and 1GHz MPC85xx CPUs with
integrated IO and networking, so it still doesn't say much, these
days.
BR wrote:
> Question for the group. What do you find as the most suitable embedded
> processor for implimenting LISP?
Just a few questions. How much will this cost? How much
RAM/EPROM/Flash does it need? Any power consumption requirements?
These are more important questions. If some 8-bit microcontroller
will do ($5.00) it will be different than if you need some N-Ghz
processor (say $250).
Wade